According to news on April 27,
TSMC recently updated its process roadmap, saying that its 4-nanometer process chip will enter the “risk production” stage at the end of 2021 and achieve mass production in 2022; 3 nanometer products are expected in the second half of 2022 In production, the 2nm process is under development .
In terms of production capacity,
no competitor can threaten TSMC’s dominant position, and neither will it in the next few years. As for manufacturing technology, TSMC recently reiterated that it is confident that its 2 nanometer (N2), 3 nanometer (N3) and 4 nanometer (N4) processes will be launched on time and maintain a more advanced node process lead than competitors.
Earlier this year,
TSMC substantially increased its 2021 capital expenditure budget to US$25 billion to US$28 billion, and recently increased it to about US$30 billion. This is part of TSMC’s plans to increase production capacity and R&D investment in the next three years. The company plans to invest a total of US$100 billion in three years.
About 80% of TSMC’s US$30 billion capital budget this year will be used to expand the production capacity of advanced technologies, such as 3nm, 4nm, 5nm, 6nm and 7nm chips. Huaxing Securities analysts believe that by the end of this year, most of the funds on advanced nodes will be used to expand TSMC’s 5-nanometer production capacity to 110,000 to 120,000 wafers per month.
At the same time, TSMC said that 10% of its capital expenditures will be used for advanced packaging and mask manufacturing,
and the other 10% will be used to support professional technology development, including customized versions of mature nodes.
TSMC’s recent move to increase capital expenditures was made after Intel announced its IDM 2.0 strategy (involving in-house production, outsourcing, and foundry operations), and to a large extent reiterated the company’s short-term and long-term Confidence in the future.
Wei Zhejia, President and CEO of TSMC, said in a recent conference call with analysts and investors:
“As a leading foundry company, TSMC has never lacked competition in its 30-year history, but we know how to compete. . We will continue to focus on providing leading technology, excellent manufacturing services, and winning the trust of customers. Among them, winning the trust of customers is very important because we do not have internal products to compete with customers.
N5 process wins the trust of customers
TSMC is the first company to begin large-scale chip manufacturing (HVM) using its N5 process technology in mid-2020. Initially, this node was only used to serve TSMC’s most important customers, namely Apple and HiSilicon. Today, as more customers have prepared their own N5 specification chip designs, the adoption of this node is growing. At the same time, TSMC stated that there are more customers planning to use the N5 series of technologies (including N5, N5P and N4) than expected a few months ago.
Wei Zhejia said: “
N5 has entered the second year of mass production, and the output is higher than our original plan. Driven by smartphones and high-performance computing (HPC) applications, the demand for N5 will continue to be strong. We expect N5 in 2021. Will contribute about 20% of wafer revenue. In fact, we see more and more customers for N5 and N3. The demand is so high, we must be prepared to deal with it.”
For TSMC, HPC applications include many different types of products,
such as AI accelerators, CPUs, GPUs, FPGAs, NPUs, and video game SoCs. Since TSMC is only a foundry manufacturer, it will not disclose which node it uses to produce products, but the fact that the adoption rate of N5 in the HPC field is growing is very important.
Wei Zhejia said: “We expect that driven by the strong demand for smartphones and HPC applications, the demand for our N5 series will continue to grow in the next few years. We expect that HPC will not only appear in the first wave of growth, but in fact will continue to grow. More demand waves are emerging to support our leading N5 node in the future.”
TSMC’s N5’s market share among adopters of cutting-edge technology is increasing,
which is not particularly surprising. Huaxing Capital analysts estimate that the transistor density of TSMC’s N5 is approximately 170 million transistors per square millimeter, which will make it the highest density technology available today. In contrast, Samsung Electronics’ 5LPE can hold approximately 125 million to 130 million transistors per square millimeter, while Intel’s 10-nanometer node transistor density is approximately 100 million per square millimeter.
In the next few weeks, TSMC will begin manufacturing chips using its N5 improved technology performance enhanced version called N5P, which promises to increase frequency by up to 5% or reduce power consumption by up to 10%. N5P provides customers with a seamless migration path without a large investment in engineering resources or a longer design cycle, so any user who uses N5 design can use N5P. For example, early adopters of N5 can reuse their IP for N5P chips.
N4 will be put into mass production next year
TSMC’s N5 series technology also includes N4 process chips that will enter the “risk production” stage later this year and will be used in mass production in 2022. This technology will provide more PPA (power, performance, area) advantages than N5, but maintain the same design rules, design infrastructure, SPICE simulation program and IP. At the same time, as N4 further expands the use of EUV lithography tools, it also reduces the number of masks, process steps, risks and costs.
Wei Zhejia said: “N4 will use the strong foundation of N5 to further expand our 5nm series of technological advantages. N4 is directly migrated from N5, has compatible design rules, and provides further performance and power for the next wave of 5nm products And density increases. N4’s goal is to enter the risk production stage in the second half of this year and achieve mass production in 2022.”
When N4 products are put into mass production in 2022,
N3 will be unveiled in the second half of 2022
In 2022, TSMC will launch its new N3 manufacturing process, which will continue to use FinFET transistors, but is expected to provide a complete set of PPA improvements. In particular, compared with the current N5 process, TSMC’s N3 promises to increase performance by 10%-15%, or reduce power consumption by 25%-30%. At the same time, depending on the structure, the new node will also increase the transistor density by 1.1 to 1.7 times.
N3 will further increase the number of EUV layers, but will continue to use DUV lithography.
In addition, since the technology is always using FinFET, it will not require a new generation of electronic design automation (EDA) tools redesigned from the ground up and the development of new IP, which may have a more competitive advantage than Samsung’s 3GAE based on GAAFET/MBCFET .
Wei Zhejia said: “N3 will be our next full node leap after N5. It will use FinFET transistor structure to provide our customers with the best technology maturity, performance and cost. Our N3 technology development is progressing well. With N5 Compared to N7, we continue to see much higher customer engagement in N3’s HPC and smartphone applications.”
In fact, TSMC claims that customers are getting more and more involved in N3,
which indirectly shows that it has high hopes for N3. Wei Zhejia said: “N3 risk production is expected to start in 2021, and the mass production target is in the second half of 2022. After our N3 technology is launched, it will become the most advanced foundry technology in PPA and transistor technology. We are confident that we Both N5 and N3 will become TSMC’s large-scale and long-lasting node processes.”
Full gate field effect transistor (GAAFET) is still an important part of TSMC’s development roadmap. The company expects to use brand new transistors in its “post-N3” technology (presumably N2). In fact, TSMC is in the process of looking for next-generation materials and transistor structures, which will be used in many years to come.
TSMC stated in its recent annual report: “For advanced CMOS (Complementary Metal Oxide Semiconductor), TSMC’s 3nm and 2nm CMOS nodes are progressing smoothly on the assembly line.” In addition, TSMC’s enhanced exploratory research and development work is focused on 2nm. Nodes, 3D transistors, new memories, and Low-R interconnects are fields that are laying a solid foundation for the introduction of many technology platforms.
It is worth noting that TSMC is expanding its research and development capabilities at its No. 12 factory and is currently developing N3, N2 and more advanced nodes.
Confident to surpass the overall growth rate of the foundry industry
Overall, TSMC believes that its “everyone’s foundry” (everyone’s foundry) strategy will enable it to further grow in terms of scale, market share and sales. The company also expects to maintain its technological leadership in the future, which is critical to its growth.
TSMC’s Chief Financial Officer Huang Wende said in a recent conference call with analysts and investors: “We now predict that the growth rate of the foundry industry for the entire year of 2021 is about 16%. For TSMC, we are confident that we can surpass The overall growth of the foundry industry will achieve a growth of about 20% in 2021.”
The company has a strong technology roadmap and will continue to introduce improved cutting-edge nodes every year to provide customers with technological improvements at a predictable pace.
TSMC knows how to compete with competitors with cutting-edge nodes and chip manufacturers focusing on specialized process technology, so it does not see Intel Foundry Services (IFS) as a direct threat, especially because the latter focuses on cutting-edge and advanced technologies. Node.
Financial analysts generally agree with TSMC’s optimistic attitude, mainly because it is expected that the company’s N3 and N5 nodes will not have competitors offering similar transistor density and wafer production capacity.
An analyst at Huaxing Securities said:
“Following the return of Intel’s foundry business announced in March this year, TSMC is willing to formulate a three-year US$100 billion capital expenditure and R&D investment plan starting in 2021, which demonstrates its confidence in expanding its foundry business. We believe that with the emergence of N3 and N5, TSMC’s strategic value is also rising: HPC and smartphone applications N5 production activities are strong, and compared with N5 and N7 at similar stages, N3 customer engagement higher.